Computer
chips have stopped getting faster. In order to keep increasing chips'
computational power at the rate to which we've grown accustomed, chipmakers are
instead giving them additional "cores," or processing units.
Today,
a typical chip might have six or eight cores, all communicating with each other
over a single bundle of wires, called a bus. With a bus, however, only one pair
of cores can talk at a time, which would be a serious limitation in chips with
hundreds or even thousands of cores, which many electrical engineers envision
as the future of computing.
Li-Shiuan
Peh, an associate professor of electrical engineering and computer
science at Massachusetts
Institute of Technology (MIT), wants cores to communicate the same way
computers
hooked to the Internet do: By bundling the information they transmit
into "packets." Each core would have its own router, which could send a
packet down
any of several paths, depending on the condition of the network as a
whole.
At
the Design Automation Conference, Peh and her colleagues will present a paper
she describes as "summarizing 10 years of research" on such "networks on chip."
Not only do the researchers establish theoretical limits on the efficiency of
packet-switched on-chip communication networks, but they also present
measurements performed on a test chip in which they came very close to reaching
several of those limits.
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